(Repost) CXMT to launch DDR5 RDIMM products using 4F² memory cell architecture within this year

Another case has emerged showing that China's CXMT is aggressively threatening the so-called "Big 3" memory semiconductor companies—Samsung, SK Hynix, and Micron—based on its newly secured technological capabilities.
In particular, this news is quite ambitious in scope, detailing how CXMT is accelerating its preparations to overtake Samsung by approximately two years in the field of next-generation "4F²" memory cell architecture.
While CXMT has set a goal to launch server memory products applying a completely new memory cell architecture by the end of 2026, Samsung Electronics plans to produce memory products based on said new architecture only in 2028.
In fact, CXMT CEO Cao Kanyu recently presented on the development status of next-generation 4F² DRAM architecture and innovative technologies such as hybrid bonding at the "4th Integrated Chip and Chiplet Conference" held in Shanghai.
During the presentation, Dr. Kanyu stated that CXMT will launch DDR5 RDIMM products based on the 4F² memory cell architecture before the end of 2026, which is approximately two years ahead of Samsung Electronics' roadmap for adopting the same architecture.
For reference, RDIMM (Registered Dual In-Line Memory Module) acts as a hardware buffer that holds the signal coming from the CPU for exactly one clock cycle before passing it to the memory chips. This reduces electrical load and allows server operators to install a larger number of high-capacity RAM modules on a single motherboard.
Meanwhile, the 4F² process is a next-generation memory cell architecture that stacks the components of a single memory cell (one transistor and one capacitor) vertically rather than horizontally. Through this design change, the area (footprint) occupied by a single memory cell becomes a perfect square equal to four times the "square of the minimum feature size (F)" (4 × F²), consisting of exactly two bitlines and two wordlines. Here, bitlines and wordlines refer to the wiring structures used to drive the transistors within each memory cell. By simply changing the structure to the 4F² method, DRAM manufacturers can increase the cell density of each IC by 30% to 50%.